The present disclosure relates generally to cache memory, and in particular, to dynamic array masking of the cache memory.
Conventionally, array masking may be employed to circumvent defects or cache errors within a cache memory of a computer system. Array masking, in general, is an identification of the defects or the cache errors (e.g., correctable and uncorrectable errors) as part of a diagnostic test of the computer system to bring the computer system online, followed by a marking of portions of the cache memory that are unusable due to uncorrectable errors. If a correctable error is identified, then a corresponding cache error is fixed prior to running the computer system. If an uncorrectable error is identified, then a masking bit is enabled for a portion of the cache memory associated with the uncorrectable error so that when the computer system is running, that corresponding portion is skipped. However, not only does conventional array masking due to this diagnostic, mark, and run approach fail to keep pace with addressing real-time cache errors, experience has also shown that cache array errors lead to multiple field unscheduled incident repair actions.